The fabrication of electronic devices on semiconductor substrates, such as ultra large scale integration (ULSI) device fabrication, has resulted in integrated circuit (IC) chips having substantial miniaturization of electronic device dimensions. Conventional aluminum/silicon oxide (Al/SiO2) interconnect architectures have proven inadequate to meet the demand for higher interconnect performance (e.g., IC speed and reliability lifetime) needed to support increasingly miniaturized electronic device fabrication with higher chip integrated densities. To support further miniaturization, industry has chosen copper metalization to replace aluminum.
Copper offers a number of important advantages associated with higher interconnect performance. For instance, copper can increase interconnect performance by reducing interconnect propagation delays and cross talk, and by enabling higher metalization current densities than are available with aluminum. In addition, copper offers reliability and cost advantages in the manufacturing of electronic devices. For instance, when combined with low-k dielectrics, copper""s superior electromigratior performance and lower resistivity reduces the number of metalization levels needed for a given IC chip. This reduction in the number of metalization levels results in reduced manufacturing cost and/or increased yield.
A number of deposition methods allow for the deposition of copper on a substrate, including electrochemical deposition or plating, Physical-Vapor Deposition (PVD), and Metal-Organic Chemical-Vapor Deposition (MOCVD)). Plating deposits copper by creating a charge potential between a copper-containing electrochemical bath and the substrate. Although plating can deposit copper films having adequate characteristics to support interconnect functions on a substrate, plating requires additional equipment for deposition of barrier and other layers on the substrate. Moreover, electrochemical deposition (ECD) methods produce significant amounts of wet chemical waste requiring expensive disposal. These additional requirements increase manufacturing cost and complexity. By comparison, PVD and MOCVD advantageously allow clustering of copper deposition with barrier deposition and preclean processes, such as with process module reaction chambers clustered around a vacuum-integrated cluster tool available from CVC, Inc. The capability for fully vacuum-integrated deposition of the diffusion barrier and copper layers onto semiconductor substrates makes a MOCVD-based option very attractive due to the reduced complexity of the deposition process sequence and the greater equipment productivity.
Copper deposition with MOCVD provides a number of additional advantages compared with to ECD and PVD. For instance, MOCVD-deposited copper used to form integrated plugs and metal lines has excellent gap-fill characteristics at a low thermal budget, such as less than 250xc2x0 C., making MOCVD deposition of copper compatible with single and dual damascene processing and compatible with low-k polymer dielectrics. The resulting interconnect architectures provide low metal resistivity, reduced interconnect propagation delay and cross-talks, and good electromigration lifetime characteristics.
Although MOCVD copper deposition can form high-quality copper films to act as integrated circuit conductive interconnects, the films frequently have poor adhesion to underlying diffusion barrier layers. Poor adhesion between the copper film and the underlying barrier is attributed to interface contamination that is formed during conventional MOCVD copper processes using commonly available precursors. The interfacial contaminates which can have a detrimental impact on copper film adhesion include carbon and fluorine, both present in common copper MOCVD precursors. A copper film formed with conventional MOCVD to interface with a substrate barrier layer frequently fails to pass the scribe plus tape pull test, and can separate from the barrier during chemical-mechanical polishing (CMP) processes used to form inlaid conductive copper plugs and metal lines. The scribe plus tape test is accomplished by physically scribing a tick-tac-toe design in the copper film and then attempting to lift the copper film from the barrier layer with a tape pull. If a copper film has adequate adhesion to the barrier layer, the tape pull force will not lift the film from the barrier. In contrast, failure to pass the scribe plus tape test indicates that the copper film has inadequate adhesion to the barrier layer, and that the process used for the deposition of the copper film will not support large scale commercial production of chips having copper interconnects.
Therefore a need has arisen for a method that deposits a copper film having good adhesion to an underlying layer.
A further need exist for a method that supports deposition of copper films with vacuum-deposition equipment that is compatible with the equipment used to deposit other films on the substrate.
A further need exist for a method that supports the deposition of copper films with reduced complexity and high reliability.
A further need exist for a method that will support a high-throughput fabrication of semiconductor integrated circuit, having copper interconnects.
In accordance with the present invention a method is provided that substantially eliminates or reduces disadvantages and problems associated with previously developed methods for depositing copper films on substrates.
A first material is deposited on the substrate to form an interface with an underlying layer associated with the substrate and to act as a seed layer for the copper layer. The seed layer is deposited to have good adhesion to the underlying layer of the substrate, such as the diffusion barrier of the substrate. The copper layer is then deposited on the seed layer to form the copper film on the substrate, such as the copper film that forms a copper interconnect. The first material forms a seed layer by using deposition according to first predetermined conditions that optimize adhesion of the seed layer to the underlying layer of the substrate. The copper layer is deposited on the seed layer according to second predetermined conditions, such as conditions that will optimize properties and maximize the throughput available for deposition of a copper bulk layer. For instance, the seed layer thickness can range from 50 to 500 angstroms depending on the adhesion enhancement method, and the bulk layer thickness can range from 200 to 15,000 angstroms.
One predetermined condition for depositing the seed layer is depositing the first material onto a substrate barrier to form an interface or a buffer layer between the barrier and the bulk copper layer that forms the copper interconnect, but to anneal the first material before deposition of the bulk copper layer. The first material can comprise a generally thin layer of copper that is thermally annealed at a predetermined temperature for a predetermined time. Thermal annealing promotes diffusion of copper into the barrier for atom-to-atom bonding and disassociates or displaces the contaminates associated with the interface (typically carbon, fluorine, and/or oxygen).
Alternatively, the first material can be an inert material that will have minimal reactivity with the precursor used to deposit copper (making it difficult for the precursor contaminants to get adsorbed on the surface). For instance, noble metals, such as platinum or iridium, are inert to contaminates associated with the MOCVD process, thus avoiding contamination of the interface during MOCVD deposition of copper. Similarly, passivated metals, such as tantalum nitride, titanium nitride, TaOxNy and TiOxNy can be used as the first material.
Alternatively, the first material can be a catalytic material, such as chromium, tin, zinc, titanium or tungsten, that alloys with copper at a relatively low temperature, and a generally thin layer of copper deposited on the catalytic layer. The catalytic material and copper are then annealed at a temperature adequate to promote alloying and interfacial bonding for excellent copper adhesion. The alloy provides good adhesion and good crystal structure to support deposition of a bulk copper layer.
Alternatively, the first material can comprise a reactant layer, such as amorphous silicon or germanium, and a generally thin layer of copper deposited on the reactant layer. The reactant layer and copper are then annealed at a temperature adequate to promote a chemical reaction (e.g. silicide or germanide) resulting in a seed layer having good adhesion and microstructural crystallinity. For instance, amorphous silicon and the thin copper layer form a copper silicide seed layer.
In one alternative embodiment the substrate surface is etched at moderate power settings before the deposition of the first material to enhance adhesion of the first material to the substrate. Etching the surface enhances surface area, promoting adhesion.
In another alternative embodiment the interface formed by the deposition of the first material is intermixed with the substrate barrier by the application of a high energy ion beam to the interface.
In another embodiment the seed layer comprises copper deposited with chemical-vapor deposition by using a precursor that minimizes contaminates, or using vaporization of deposition conditions that minimize the formation of contaminants at the interface, thus, enhancing adhesion of the copper seed layer to the substrate. The bulk copper layer is then deposited using chemical-vapor deposition methods that optimize other properties and maximize throughput with the deposition of copper at an optimal rate.
In one alternative method the seed layer is CuX composite where X is a metal other than copper. The seed layer is formed on a substrate by depositing a first material on the substrate at a first deposition rate using chemical-vapor deposition and a precursor associated with the first material (X). Copper is then simultaneously deposited (co-deposited) using chemical-vapor deposition and a precursor associated with copper. The deposition rate of the first material is gradually reduced to zero, while the deposition rate of the copper is gradually increased from zero to a greater copper deposition rate. The deposition of copper is then continued until either a seed layer is deposited or the bulk copper layer is fully deposited. The first material can comprise aluminum, chromium, tantalum nitride, W, WNx, WSix or other compatible materials that can be co-deposited with copper but that are deposited by means of a precursor that does not react with the copper precursor in the gas phase. This method advantageously avoids the formation of an abrupt interface between the substrate barrier and the copper interconnect layer by promoting intermixing and formation of a graded transition layer during the deposition process.
The present invention provides many important technical advantages. For instance, the method according to the present invention deposits a seed layer that has good adhesion with the underlying layer of the substrate. The bulk layer of copper can then be deposited on the seed layer to ensure that the copper interconnect will have good adhesion to the substrate throughout the entire semiconductor chip fabrication process flow.
Another technical advantage of the present invention is that it reduces the fabrication process complexity and types of equipment needed to deposit a copper film layer. For instance, the method according to the present invention allows deposition of a copper layer with good adhesion using chemical-vapor deposition (such as metal-organic chemical-vapor deposition or MOCVD) equipment compatible with the deposition of other materials on the substrate.
Another technical advantage of the present invention is that it reduces the complexity of the deposition of the copper layer by promoting the copper layer adhesion in reaction chambers that are compatible with vacuum-integrated cluster equipment. The reduced complexity and enhanced controllability of the deposition process with cluster equipment increases the reliability of the process.
Another important technical advantage of the present invention is that it allows increased throughput for the commercial production of semiconductor chips having copper interconnects. The use of existing chemical-vapor deposition process chambers and cluster equipment without substantial increases in the processing steps increases the manufacturing capacity and throughput.
Another technical advantage is that these methods are suitable and scalable to small feature sizes of high aspect ratio structures such as those that are commonly encountered in advanced interconnects.